The Great Silicon Pivot: Why Automotive RISC-V Microcontrollers Are Replacing ARM in Next-Gen EVs

The global automotive semiconductor landscape is undergoing its most profound structural transformation in decades. At the 2026 Sixth Intelligent Vehicle Chip Ecology Congress organized by Gasgoo, Liu Lin, Marketing Senior Manager of Automotive Business at Infineon Technologies, sent shockwaves through the industry by declaring an 'All in RISC-V' strategy. Next-generation automotive microcontroller units (MCUs) from the world's leading automotive semiconductor supplier will systematically transition toward this open-source instruction set architecture (ISA).

To put this in perspective, microcontrollers are the nervous system of modern vehicles. From managing steering columns and braking systems to regulating thermal management in electric vehicle (EV) battery packs, a modern premium EV utilizes between 100 and 150 MCUs. Historically, proprietary architectures—most notably ARM's Cortex-M and Cortex-R families, and legacy architectures like Renesas's proprietary cores or NXP's PowerPC—have dominated this multibillion-dollar market. Infineon's aggressive pivot to automotive RISC-V microcontrollers indicates that the industry's reliance on closed-source intellectual property (IP) has reached a critical breaking point.

Section 2: Technical Architecture & Deep Engineering Teardown

The technical shift from proprietary ARM or TriCore architectures to RISC-V is not merely a financial or political decision; it is a fundamental engineering evolution. RISC-V is a modular, reduced instruction set computer (RISC) ISA. Unlike ARM, which forces chip designers to purchase pre-defined, rigid processor cores, RISC-V provides a base instruction set of fewer than 50 instructions, which developers can expand with standardized or custom extensions (e.g., Vector, Floating-Point, or Bit Manipulation extensions).

For high-performance, next-generation EV platforms operating on 800V or 900V+ electrical architectures, real-time control loop frequency and latency are paramount. By leveraging RISC-V, semiconductor designers can implement custom hardware accelerators directly into the MCU core. For example, specialized instructions can speed up Field-Oriented Control (FOC) algorithms in silicon carbide (SiC) traction inverters or accelerate the complex mathematical calculations required for ISO 26262 ASIL-D functional safety lockstep processing.

Furthermore, standardizing on RISC-V enables chipmakers to address the thermal and computational requirements of localized 'Zone Controllers' in a decentralized E/E (electrical/electronic) architecture. Zone controllers aggregate data from various vehicle sensors and manage power distribution. An automotive RISC-V microcontroller configured with custom vector processing units can perform real-time diagnostic math, predictive maintenance calculations, and sensor-fusion pre-processing directly at the edge, freeing up central computer processing power (typically managed by high-power System-on-Chips like Nvidia Orin or Qualcomm Snapdragon Ride).

Section 3: Supply Chain Dynamics & Bill of Materials (BOM) Economics

The economics of RISC-V adoption are compelling, particularly as global automotive players face intense cost reduction pressures in the transition to affordable electromobility. The traditional ARM licensing framework operates on a dual-cost model: an upfront multi-million dollar license fee for a specific core architecture, followed by a perpetual royalty fee of 1% to 3% on every physical microchip fabricated and sold. In contrast, the RISC-V ISA itself is entirely free and open-source.

By shifting to RISC-V, global chip manufacturers like Infineon can bypass these substantial licensing fees and reallocate capital into advanced silicon packaging, faster design validation, and software toolchain optimization. In a typical premium EV containing up to 150 MCUs, a shift to RISC-V could yield a direct Bill of Materials (BOM) cost reduction of $15 to $40 per vehicle just on silicon licensing costs—a massive sum when multiplied across millions of units produced annually.

Crucially, the ecosystem surrounding automotive RISC-V microcontrollers is mature. In 2023, key industry giants including Infineon, Bosch, NXP, Nordic Semiconductor, and Qualcomm formed Quintauris, a joint venture dedicated to commercializing RISC-V reference architectures for the automotive market. This joint venture provides a united front to standardize hardware-software interfaces, establish uniform safety compilers, and build out a robust software ecosystem. By co-investing in Quintauris, these Tier-1 suppliers and chipmakers are building a shared foundation that ensures cross-vendor compatibility while avoiding fragmented, proprietary systems.

Section 4: Western Legacy OEM Impact & Competitive Fallout

For legacy Western automakers (Volkswagen, Stellantis, Ford, GM), Infineon's pivot to RISC-V represents both an opportunity and a direct challenge. On one hand, the shift promises to democratize microchip design, allowing legacy OEMs to work directly with ASIC (Application-Specific Integrated Circuit) design houses to develop proprietary, highly optimized processors for their unique software-defined vehicle architectures.

On the other hand, the shift highlights a major engineering gap. Many Western legacy OEMs remain deeply dependent on legacy software stacks (e.g., highly restrictive AUTOSAR configurations) that are hard-coded for legacy ARM and PowerPC microcontrollers. Porting millions of lines of legacy automotive code to work seamlessly on RISC-V microcontrollers is an expensive, labor-intensive task that requires advanced software engineering talent—a resource in notoriously short supply at traditional OEMs.

Conversely, Chinese EV brands like BYD, Geely, Xiaomi, and NIO have built their electronic architectures from a clean sheet. They have designed their hardware and software to be decoupled from the start. Consequently, Chinese automakers are already rapidly integrating RISC-V microcontrollers into their production-line vehicles, partnering with domestic semiconductor firms like Horizon Robotics, Nuclei System Technology, and StarFive. This agility allows them to leverage the cost advantages and custom performance of RISC-V long before Western legacy OEMs can successfully rewrite their legacy codebases.

Section 5: Geopolitical, Tariff & Regulatory Adaptation

The semiconductor supply chain has become a primary battleground for global trade friction. As the United States, European Union, and China deploy countervailing tariffs, strict export controls, and strict localized content mandates, proprietary IP standards like ARM have become liabilities. Because ARM is a UK-incorporated company with massive R&D operations inside the United States, its intellectual property is subject to US Export Administration Regulations (EAR) and International Traffic in Arms Regulations (ITAR).

By contrast, RISC-V International, the non-profit organization that manages the ISA standards, strategically relocated its legal incorporation from the United States to Switzerland in 2020. This move ensures that the underlying architecture remains a geopolitically neutral standard, insulated from unilateral export bans or trade sanctions. Under this model, companies in any global jurisdiction can collaborate on the core architecture and build compliant, localized implementations.

For a global player like Infineon, utilizing RISC-V is a masterful execution of a 'localized regional footprint' strategy. It allows Infineon to design a single, standardized core architecture that can be manufactured in European, US, or Chinese silicon foundries, fully conforming to regional supply chain compliance mandates. This approach ensures uninterrupted access to critical global automotive markets without violating complex international trade rules or risking sudden supply disruptions due to geopolitical gridlock.

Section 6: 3-5 Year Strategic Market Outlook & Scenario Analysis

As the automotive semiconductor sector reaches this critical fork in the road, the industry will likely evolve along one of three distinct paths over the next three to five years:

Bull Case Scenario: Rapid Standardization and Ecosystem Domination

In this scenario, the Quintauris joint venture, alongside the RISC-V Software Ecosystem (RISE) consortium, successfully standardizes the software tools, compiler chains, and real-time operating system (RTOS) support for RISC-V chips by 2028. Driven by structural cost savings and high design flexibility, automotive RISC-V microcontrollers claim more than 50% of all new automotive MCU design wins globally. Western and Chinese OEMs converge on a highly optimized, open-source standard, resulting in a dramatic drop in vehicle E/E system costs and a rapid acceleration of software-defined vehicle functionality.

Base Case Scenario: Segmented Dual-Architecture Coexistence

In the highly likely base case, the automotive industry splits along architectural lines. High-performance, safety-critical domains (such as braking, steering, and battery management) shift to advanced RISC-V microcontrollers like those designed by Infineon to take advantage of low-cost customization and geopolitical neutrality. Meanwhile, highly standardized, less complex legacy systems (such as power window motors, seat adjustments, and basic door modules) continue to rely on legacy ARM-based or proprietary MCUs, where existing software toolchains require no modification. ARM and RISC-V coexist, with RISC-V driving the technological cutting edge.

Bear Case Scenario: Ecosystem Fragmentation and Safety Certification Bottlenecks

In this downside scenario, a lack of unified industry alignment leads to extreme fragmentation of the RISC-V ISA extensions. Different silicon vendors develop proprietary, non-compatible custom instruction sets, shattering the promise of a unified open-source ecosystem. Furthermore, stringent functional safety certification (ISO 26262 ASIL-D) for new RISC-V hardware-software implementations faces prolonged regulatory delays and high testing costs. This slows down mass adoption, allowing ARM to maintain its dominant grip on the automotive MCU market by introducing aggressive licensing discounts and specialized automotive IP programs.

Section 7: Strategic Implications for Executives & Institutional Investors

From our analysis of automotive supply chain telemetry and semiconductor roadmaps, we recommend that industry leaders execute the following strategic actions:

• For Automotive OEMs: Establish immediate cross-functional task forces to evaluate the compatibility of your current vehicle software architectures with RISC-V compilers (GCC, LLVM). Begin decoupling application software from low-level hardware abstraction layers to facilitate seamless hardware migration.
• For Supply Chain Directors: Prioritize suppliers that are active participants in RISC-V standard organizations (such as Quintauris and the RISE consortium). Ensure that your multi-sourcing strategy for zone controllers and powertrain MCUs includes viable RISC-V alternatives to mitigate geopolitical and unilateral tariff risks.
• For Semiconductor Sourcing and Procurement: Leverage the emergence of RISC-V to negotiate more favorable licensing and pricing terms with established proprietary IP vendors like ARM. Use the threat of a RISC-V transition to reduce current MCU per-unit cost bases.
• For Institutional Investors: Closely monitor the capital expenditures and R&D pipelines of automotive chipmakers. Companies that proactively invest in RISC-V architectures are positioning themselves for structurally superior margins and a highly resilient global supply chain. Conversely, vendors lagging in open-architecture adoption risk losing market share to faster, low-cost entrants.